Simplify Status Point Energize (STE) - A Better Way to Monitor Process Status The STE instruction was created for a specific reason. When I first started learning PLC programming, an electrician gave me some valuable advice: minimize the use of OTL (latch) and OTU (un-latch) instructions. While I was more familiar with languages like C, Pascal, and Fortran, I found latch and un-latch instructions easier to use at the time, much to the electrician's dismay. From the electrician's perspective, using an OTE (coil) and latching it with a branch and a normally open contact was more intuitive. However, using multiple latch and un-latch instructions on the same bit can result in confusing and convoluted code. It often seems like a quick fix rather than a well-thought-out solution. Let's examine the OTE instruction, which turns a referenced bit on when certain conditions are met and off otherwise. However, if the processor is switched between Run and Program modes, the status bit can be lost, causing issues in certain situations. To address this issue, the STE instruction was developed. Similar to the OTE instruction, the STE instruction can survive a processor mode switch. By following certain rules, such as only referencing a status bit in one STE instruction per program, you can ensure that your logic is clear and concise. The STE instruction also allows for triggering events based on signal edges. It contains three signals: PT (point), LE (leading edge), and TE (trailing edge), which provide additional functionality and flexibility in programming. By implementing the STE instruction in RSLogix 5000, you can simplify your programming and ensure the reliability of your logic. For more information or assistance with implementing the STE instruction, please contact Richard Edington at[email protected]
It is important to note that this capability is enabled by new features in PLC programming languages. These include the functionality to establish logic for when the rung conditions are untrue within custom user instructions.
Defining actions for the false state is a common practice in programming. By setting up actions for the false state, you essentially create a latch/unlatch scenario. This code is designed to function in a similar manner, triggering specified actions based on input conditions such as XIC, BST, OTL, ONS, and Oneshot. Ultimately, if something resembles a duck and behaves like a duck, it can be considered a duck regardless of how it is labeled.
The option to set actions for the false state follows a standard practice. adding an action for the false state is essentially a latch/unlatch mechanism. However, there is more complexity involved in defining actions for the false state beyond just latch/unlatch operations. In comparing the two sets of rungs described, it appears that they will yield the same status indications. The question then becomes which approach is preferable for programming ease and readability, especially when time is limited. The status points accessible from this code snippet include ste_yours.pt, ste_yours.le, and ste_yours.te, all of which remain stable even during a processor mode switch.
Please refer to the attached PDF for further clarification on the importance and utility of the STE instruction.
RichardE highlighted the importance of considering that this capability is only achievable thanks to the advancements in PLC programming languages. Specifically, the crucial feature of defining logic for user-defined instructions when the rung conditions are false. Is this feature available in all PLCs? Can you confirm this?
I appreciate your clear explanation of the STE instruction, especially your comparison to OTE, OTL, and OTU instructions. This definitely deepens my understanding of how these skills could be applied in the field. I find it particularly useful that STE instructions can survive a mode switch, which would certainly be beneficial. The use of a point, leading, and trailing signal also seems to offer more programming flexibility. Your post has truly convinced me to look more into STE instruction in RSLogix 5000. Thanks!
I appreciate the depth of your explanation, it really clarifies the reasoning behind the STE instruction. I've also found myself tangled in overly complex code due to the overuse of latch and un-latch instructions. Incorporating the STE instruction into my programming techniques seems like a solid move - beneficial for simplicity and reliability of the code. Thanks for the added contact for further assistance, that's really helpful.
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Answer: - The STE instruction was developed as a solution to address issues with using latch and un-latch instructions in PLC programming. It provides a more intuitive and reliable way to monitor process status.
Answer: - The STE instruction offers better clarity and reliability by surviving processor mode switches and allowing triggering events based on signal edges, unlike the confusion that can arise from multiple latch and un-latch instructions on the same bit.
Answer: - By implementing the STE instruction, programmers can simplify their logic, ensure reliability, and gain additional functionality and flexibility in programming. This can lead to clearer and more concise code.
Answer: - To make the most of the STE instruction, it is recommended to follow certain rules, such as referencing a status bit in only one STE instruction per program. This helps maintain the clarity and conciseness of your logic.
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